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| INTEGRATED CIRCUITS 74LV03 Quad 2-input NAND gate Product data Supersedes data of 1998 Apr 20 2003 Mar 03 Philips Semiconductors Philips Semiconductors Product data Quad 2-input NAND gate 74LV03 FEATURES * Wide operating voltage: 1.0 V to 5.5 V * Optimized for Low Voltage applications: 1.0 V to 3.6 V * Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V * Typical VOLP (output ground bounce) < 0.8 V @ VCC = 3.3 V, * Typical VOHV (output VOH undershoot) > 2 V @ VCC = 3.3 V, * Level shifter capability * Output capability: standard * ICC category: SSI Tamb = 25 C Tamb = 25 C DESCRIPTION The 74LV03 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT03. The 74LV03 provides the 2-input NAND function. The 74LV03 has open-drain N-transistor outputs, which are not clamped by a diode connected to VCC. In the OFF-state, i.e., when one input is LOW, the output may be pulled to any voltage between GND and VOmax. This allows the device to be used as a LOW-to-HIGH or HIGH-to-LOW level shifter. For digital operation and OR-tied output applications, these devices must have a pull-up resistor to establish a logic HIGH level. (open drain) QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr =tf 2.5 ns SYMBOL tPZL/tPLZ CI CPD PARAMETER Propagation delay nA, nB to nY Input capacitance Power dissipation capacitance per gate Notes 1, 2 CONDITIONS CL = 15 pF VCC = 3.3 V TYPICAL 8 3.5 4 UNIT ns pF pF NOTES: 1 CPD is used to determine the dynamic power dissipation (PD in W) PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: N = the number of outputs switching; fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL x VCC2 x fo) = sum of the outputs. 2 The condition is VI = GND to VCC 3 The given value of CPD is obtained with : CL = 0 pF and RL = ORDERING INFORMATION PACKAGES 14-Pin Plastic SO TEMPERATURE RANGE -40 C to +125 C ORDER CODE 74LV03D PKG. DWG. # SOT108-1 PIN CONFIGURATION PIN DESCRIPTION PIN NUMBER SYMBOL 1A to 4A 1B to 4B 1Y to 4Y GND VCC Data inputs Data inputs Data outputs Ground (0 V) Positive supply voltage FUNCTION 1A 1B 1Y 2A 2B 2Y GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC 4B 4A 4Y 1, 4, 9, 12 2, 5, 10, 13 3, 6, 8, 11 7 14 3B 3A 3Y SV00354 2003 Mar 03 2 Philips Semiconductors Product data Quad 2-input NAND gate 74LV03 LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC) 1 2 1A 1Y 1B 3 1 2 & 3 4 5 2A 2Y 2B 6 4 5 & 6 9 10 3A 3Y 3B 8 9 10 & 8 12 13 4A 4Y 4B 11 12 13 & 11 SV00355 SV00356 LOGIC DIAGRAM Y FUNCTION TABLE INPUTS nA L nB L H L H OUTPUT nY Z Z Z L A L H H GND B NOTES: H = HIGH voltage level L = LOW voltage level Z = High impedance OFF-state SV00357 70 2003 Mar 03 3 Philips Semiconductors Product data Quad 2-input NAND gate 74LV03 RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VO Tamb PARAMETER DC supply voltage Input voltage Output voltage Operating ambient temperature range in free air See DC and AC characteristics VCC = 1.0 V to 2.0 V tr, tf Input rise and fall times VCC = 2.0 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 3.6 V to 5.5 V CONDITIONS See Note1 MIN 1.0 0 0 -40 -40 - - - - - - - - TYP. 3.3 - - MAX 5.5 VCC VCC +85 +125 500 200 100 50 UNIT V V V C ns/V NOTES: 1 The LV is guaranteed to function down to VCC = 1.0 V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2 V to VCC = 5.5 V. ABSOLUTE MAXIMUM RATINGS1, 2 In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK IOK IO IGND, ICC Tstg PTOT PARAMETER DC supply voltage DC input diode current DC output diode current DC output source or sink current - standard outputs DC VCC or GND current for types with -standard outputs Storage temperature range Power dissipation per package -plastic mini-pack (SO) for temperature range: -40 C to +125 C above +70 C derate linearly with 8 mW/K VI < -0.5 or VI > VCC + 0.5 V VO < -0.5 or VO > VCC + 0.5 V -0.5V < VO < VCC + 0.5 V CONDITIONS RATING -0.5 to +7.0 20 50 25 50 -65 to +150 500 UNIT V mA mA mA mA C mW NOTES: 1 Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2 The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2003 Mar 03 4 Philips Semiconductors Product data Quad 2-input NAND gate 74LV03 DC CHARACTERISTICS Over recommended operating conditions voltages are referenced to GND (ground = 0 V) LIMITS SYMBOL PARAMETER TEST CONDITIONS MIN VCC = 1.2 V VIH HIGH level Input voltage VCC = 2.0 V VCC = 2.7 V to 3.6 V VCC = 4.5 V to 5.5 V VCC = 1.2 V VIL LOW level Input voltage VCC = 2.0 V VCC = 2.7 V to 3.6 V VCC = 4.5 V to 5.5 V VCC = 1.2 V; VI = VIH or VIL; -IO = 100 A VOH HIGH level output voltage all outputs out uts voltage; VCC = 2.0 V; VI = VIH or VIL; -IO = 100 A VCC = 2.7 V; VI = VIH or VIL; -IO = 100 A VCC = 3.0 V; VI = VIH or VIL; -IO = 100 A VCC = 4.5 V; VI = VIH or VIL; -IO = 100 A VOH HIGH level output voltage; g STANDARD outputs VCC = 3.0 V; VI = VIH or VIL; -IO = 6 mA VCC = 4.5 V;VI = VIH or VIL; -IO = 12 mA VCC = 1.2 V; VI = VIH or VIL; IO = 100 A VOL LOW level output voltage out uts voltage; all outputs VCC = 2.0 V; VI = VIH or VIL; IO = 100 A VCC = 2.7 V; VI = VIH or VIL; IO = 100 A VCC = 3.0 V; VI = VIH or VIL; IO = 100 A VCC = 4.5 V; VI = VIH or VIL; IO = 100 A VOL LOW level output voltage; g STANDARD outputs HIGH level output leakage current HIGH level output leakage current Input leakage current Quiescent supply current; SSI Additional quiescent supply current per input VCC = 3.0 V; VI = VIH or VIL; IO = 6 mA VCC = 4.5 V; VI = VIH or VIL; IO = 12 mA VCC = 2.0 V to 3.6 V; VI = VIL; VO = VCC or GND VCC = 2.0 V to 3.6 V; VI = VIL; VO = 6.0 V2 VCC = 5.5 V; VI = VCC or GND VCC = 5.5 V; VI = VCC or GND; IO = 0 VCC = 2.7 V to 3.6 V; VI = VCC - 0.6 V 1.8 2.5 2.8 4.3 2.40 3.60 1.2 2.0 2.7 3.0 4.5 2.82 4.20 0 0 0 0 0 0.25 0.35 0.2 0.2 0.2 0.2 0.40 0.55 5.0 10 1.0 20.0 500 0.2 0.2 0.2 0.2 0.50 V 0.65 10 20 1.0 40 850 A A A A A V 1.8 2.5 2.8 4.3 2.20 V 3.50 V 0.9 1.4 2.0 0.7*VCC 0.3 0.6 0.8 0.3*VCC -40C to +85C TYP1 MAX -40C to +125C MIN 0.9 1.4 2.0 0.7*VCC 0.3 0.6 0.8 0.3*VCC V V MAX UNIT IOZ IOZ II ICC ICC NOTES: 1 All typical values are measured at Tamb = 25 C. 2 The maximum operating output voltage (VO(max)) is 6.0 V. 2003 Mar 03 5 Philips Semiconductors Product data Quad 2-input NAND gate 74LV03 AC CHARACTERISTICS FOR 74LV03 GND = 0 V; tr = tf 2.5 ns; CL = 50 pF; RL = 1 k SYMBOL PARAMETER WAVEFORM CONDITION VCC (V) 1.2 2.0 tPZL/tPLZ Propagation delay nA, nB, to nY Figures, 1, 2 2.7 3.0 to 3.6 4.5 to 5.5 NOTE: 1 Unless otherwise stated, all typical values are at Tamb = 25 C. 2 Typical value measured at VCC = 3.3 V. 3 Typical value measured at VCC = 5.0 V. MIN - - - - - LIMITS -40 to +85 C TYP1 50 17 13 102 -3 MAX - 26 19 16 13 LIMITS -40 to +125 C MIN - - - - - MAX - 31 23 19 16 ns UNIT AC WAVEFORMS VM = 1.5 V at VCC 2.7 V 3.6 V VM = 0.5 V * VCC at VCC < 2.7 V and 4.5 V VOL and VOH are the typical output voltage drop that occur with the output load. VX = VOL + 0.3 V at VCC 2.7 V and 3.6 V VX = VOL + 0.1 * VCC at VCC < 2.7 V and 4.5 V TEST CIRCUIT VCC 2 * VCC Open GND VO D.U.T. RT CL 50 pF RL = 1k RL = 1k VI PULSE GENERATOR Test Circuit for Outputs VI nA, nB INPUT VCC tPLZ GND tPLH/tPHL nY OUTPUT VX tPHZ/tPZH GND VM tPLZ/tPZL Open 2 * VCC < 2.7V 2.7-3.6V w 4.5V VCC 2.7V VCC tPZL VM DEFINITIONS RL = Load resistor CL = Load capacitance includes jig and probe capacitiance. RT = Termination resistance should be equal to ZOUT of pulse generators. SWITCH POSITION TEST S1 VCC VI VOL SV00896 Figure 2. Load circuitry for switching times SV00358 Figure 1. Input (nA, nB) to output (nY) propagation delays. 2003 Mar 03 6 Philips Semiconductors Product data Quad 2-input NAND gate 74LV03 REVISION HISTORY Rev _3 Date 20030303 Description Product data (9397 750 11191). ECN 853-1963 29494 of 07 February 2003. Supersedes data of 1998 Apr 20 (9397 750 04403). * Delete DIL, SSOP and TSSOP package ordering and package outlines (discontinued options). * Correct power dissipation formula. _2 19980420 Product specification (9397 750 04403). ECN 853-1963 19257 of 20 April 1998. Supersedes data of 1997 Mar 28. Modifications: Data sheet status Level I Data sheet status [1] Objective data Product status [2] [3] Development Definitions This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. Definitions Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products--including circuits, standard cells, and/or software--described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 (c) Koninklijke Philips Electronics N.V. 2003 All rights reserved. Printed in U.S.A. Date of release: 03-03 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. Document order number: 9397 750 11191 Philips Semiconductors 2003 Mar 03 7 |
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